The present invention relates to synchronization of multiple integrated circuits, which may be signal converters such as analog-to digital converts (ADCs) or digital-to-analog converters (DACs).
Oftentimes, multiple signal converters are provided in parallel in an electrical system. To operate efficiently, the signal converters must be synchronized. In some applications, however, such as poly-phase measurement systems, multiple signal converters (e.g., ADCs) are placed in different multiple integrated circuits because of the isolation needed between the sampling side and the control side. The two sides typically operate at two different voltage levels. The integrated circuits, therefore, contain an isolation barrier for the two different voltage levels. However, since the ADCs are on discrete integrated circuits, synchronization between the ADCs becomes problematic.
One conventional solution is to add a designated pin on each integrated circuit for synchronization purposes. In this solution, a common time-based signal is provided from a sync master to all slave integrated circuits via the designated synchronization pin. This solution, though, has serious drawbacks. For one, the designated synchronization pin is an extraneous pin that takes up valuable circuit space, which typically is at a premium due to trends toward integrated circuit size reduction. Furthermore, since the pin is common to all integrated circuits, it is subject to interference. The interference can generate glitches causing inaccurate results.
Therefore, the inventors recognized a need in the art for multiple integrated circuit synchronization with a common clock but without a designated common time-based signal, and corresponding designated pin(s), between the sync master and slave integrated circuits.